Shrinking Transistors with Nanotechnology
Nanotechnology researchers in the microprocessor industry have made improvements in nanolithography and changes in the nanoscale structure of the transistors that are increasing the density of transistors in microprocessors. And there is more to come.
Field Effect Transistors (FET) as switches
The structure of the type of transistor used in microprocessors containing hundreds of millions of transistors on an integrated circuit is called a FET.
Placing voltage on the gate allows current to flow through the channel between the source and the drain. The transistor is therefore acting as a switch.
Current flows when voltage is applied to the gate and stops flowing when there is no voltage. As the channel length gets smaller, however, the chance of current leaking through the channel between the source and the drain increases, even when no voltage is on the gate.
Integrated circuit manufacturers are planning to modify this structure for minimum feature sizes of about 14 nm and less to reduce the amount of leakage through the channel. This modified transistor is called a finFET because of the fin-shaped channel above the substrate.
With the gate on the top and two sides of the channel, the voltage applied to the gate has more effect on the channel than in the conventional FET, which has the gate only on the top surface of the channel.
Intel has announced that they are implementing a finFET transistor structure called Tri-Gate on their 22-nm microprocessors. Using these transistors will provide either reduced power consumption at the same speeds as their current 32-nm microprocessors or increased speeds with the same power consumption.
Using a nanowire as the channel of the FET is a method that researchers are exploring to make even more progress in reducing current leakage. A nanowire transistor consists of a nanowire made of semiconducting material connecting the source and drain of the transistor, with a gate controlling the current flow through the nanowire. The nanowire is vertical, like the fin, rising up from the substrate.
Using a nanowire as the channel allows you to completely wrap the gate around the channel. This should allow the voltage applied to the gate to have even more control over the channel than when using the finFET. This vertical structure also saves space, allowing a higher density of transistors on a chip. Millions or billions of vertical nanowires could be grown on a substrate.
Pack transistors on to integrated circuits
Researchers are investigating other nanomaterials to make smaller transistors and to pack them more tightly in integrated circuits. Two of the leading contenders are:
Quantum dots: Researchers have demonstrated that they can build transistors in which quantum dots form the channel through which current flows. That channel can be as small as 4 nanometers in diameter. The challenge here is to develop a method of integrating these nanoparticles into a process to build very dense integrated circuits.
Carbon nanotubes: You can use semiconductor-type carbon nanotubes as transistor channels, similar to the way you can use nanowires. The use of carbon nanotubes, however, has various complications.
For example, when you grow carbon nanotubes, both semiconductor- and metallic-type carbon nanotubes are produced. You need a step in the manufacturing process that runs a current through the metallic nanotubes to intentionally burn them out, just as you might unintentionally burn out a fuse. Researchers must work out details like this before they can use carbon nanotubes in mass-produced integrated circuits.